Re: [CAD_CAM_EDM_DRO] Problem with Lindsay/Duncan DRO 5.1 program and IRQ interface

On Mon, 25 Aug 2003 21:46:10 -0400, you wrote:

>Forewarning: I'm not an electrical engineer (I'm a chem eng), so I might get
>some of the terms wrong, please bear with me on this.
>
>
>
>I'm using the DRO program and interface designed by Steve Lindsay and
>updated by Robert Duncan, version 5.1 with the updated integrated circuit
>with IRQ schematic (with one change, I used two 7486 chips (quad exclusive
>or), in place of the two 4077 chips (quad exclusive nor), as I had them
>on-hand, the wiring of the board was corrected to accommodate the change, as
>functionally they should be identical in this application but the pinouts
>are slightly different, according to my dad, an electrical engineer) and I'm
>having a problem with the IRQ portion of the interface. The program is
>running on a Pentium 133 laptop with 48 megs of ram using the IRQ mode of
>operation, step size is 0.00039xxx"/step on X and Y, and 0.00069xxx"/step on
>the Z (Encoder Tech 25cpmm linear strips on X and Y, US Digital 360cpi
>linear strip on Z).
>

One thing is that an exclusive or is not the same as an exclusive
nor... the Nor gate has an extra inverter in it... You need to either
put an inverter in the output of each gate, or one of the signals
needs to be inverted... It's not just a pin change.

>
>
>When two encoders transition simultaneously (for example, moving both X and
>Y at the same time at a rapid pace), eventually the two axis will have a
>transition extremely close together and the IRQ does not have time to reset
>after the transition from one axis before the transition from the other axis
>occurs. Thus, the IRQ 'misses' a transition, while the raw data catches it
>and the program counts this as an error (as it saw a data transition, but no
>IRQ transition) and loses the 'missed' movement.

I don't know the schematic, but this could possibly be solved by
latching the state of both interrupts, and having the program reset
them when it's finished with whatever it was doing...

That way, if no IRQ is acknowledged from one channel, the hardware has
latched it internally, on the board, and the interrupt remains and
"should" be caught the next time by.

>
>
>
>This is giving me fits as my Enco Mill/Drill has enough vibration to trigger
>transitions in the Z or Y axis (yes, I get lazy and don't always lock the
>non-moving axis as I should, as I mostly use it to mill out areas wider than
>the diameter of the end mill) when I am milling in the X direction, thus
>losing count on one of the axis and screwing the whole thing up.
>
>
>
>If I turn off the IRQ mode, I can move all three axis (with my dad lending a
>hand to move the 3rd one) as fast as I can spin the handles with no errors,
>but I'd prefer the certainty of the IRQ interface rather than relying on raw
>computing power to not miss a transition.
>

You're making a small interrupt controller in hardware by latching
it...

>
>
>Technical diagram and explanation:
>
>If I'm a little unclear, download this interface schematic:
>http://ns1.dicomm.net/~axtein/dro/irq.zip and examine the file irq.jpg
>contained within: if pin 10 of U4 and pin 10 of U3 transition simultaneously
>(as would happen if moving the X or Y axis while also moving the Z or A
>axis)(not exactly simultaneously, just very, very close together with
>regards to time), pin 11 of U3 will not transition as required and the
>system will have an error. This also happens if pin 3 of U3 and pin 4 of U3
>transition simultaneously, pin 10 of U3 will miss, or if pin 3 of U4 and pin
>4 of U4 transition simultaneously pin 10 of U4 will miss, so all three gates
>would need to be replaced.
>
>
>
>So, in conclusion, I'll get to my questions:
>
>Have other users of the IRQ interface mode of the DRO 5.1 software noticed
>errors when two axis transition at the same time? Or is this a problem of
>my own doing, due to the substituion of the 7486 chips for the 4077 chips?

That I do not know... depends on whether or not the interrupts are
level or edge... most interrupts are edge... still, you have the
opposite edge here...

>
>
>
>Are there any logic chips (or other solutions) that can replace the
>4077/7486 chips (rewiring the board would be acceptable, this is assuming
>that the 4077 chips would have the same problem as my 7486 chips) that would
>fix the problem of the missed transitions?
>

I'd try flipping the phase of one of the signals to the 7486 chips...
any one would be just fine.

That may fix the entire problem.

Harvey

>
>
>Thanks,
>
>John
>