ARTS DRO schematic

I'm having a bit of trouble with the "interface schematic" at
http://bellsouthpwp.net/A/r/Arts_home_page/DRO/ Specifically, the
question is about the Each IC portion. Each IC gets +5v at pin 14 in
parallel with a 1 uf cap? And pin 7 is gnd and that's tied to par port
22, right? I think I get most of it, including tying theunused
inputson the 7414 to gnd, but don't understand what par port pins 1
and 10 give me. Any help/confirmation/encouragement would be much
appreciated.