Re: [CAD_CAM_EDM_DRO] USC of Jon Elson

Ok - this is the way to go then!
I'm almost done constructing X-Y table - will try to exercise it with
your board.
Regards, Alex

Jon Elson wrote:

>alex wrote:
>
>
>
>>Can't I get away with one loop in a case of low speed and low
>>intrtial load? This would be nice at least for
>>hardware testing. Then I could build on it...
>>
>>
>>
>Oh sure, for testing purposes. If you keep it under 50 full steps a second
>it should work OK.
>
>
>
>>
>>
>>
>>
>>>This all assumes you are talking about using my board. If not, you
>>>really have to do all the same stuff, but you have to generate the train
>>>of step pulses, too.
>>>
>>>
>>>
>>>
>>>
>>This is good - no pilse train!
>>
>>
>>
>>
>>
>>>You really need a real time system, or to be totally
>>>sure that there are no OS routines that will steal time from your loops
>>>to make your step pulses have timing jitter.
>>>
>>>
>>>
>>>
>>>
>>Dos is cheap enough for me!
>>
>>
>>
>>
>Yup, works fine on most systems, but be aware that laptops may have secret
>interrupts to operate things on the motherboard that steal time from the
>CNC task.
>
>Jon
>
>
>
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