Re: Smart/Dumb box again... (CPU timing)

Meanwhile, Master 5 just keeps running machines from windows...

Like the bumblebee, it must not know it can't...

Ballendo

P.S. Art F had mentioned making the "engine" of master control
available?!? Only real limit was 8192 steps per second or less. I'm
interested... Art?

--- In CAD_CAM_EDM_DRO@y..., dkowalcz@i... wrote:
> Alan,
>
> Thanks for the correction, really...! I picked up a reference on
> modern CPU architecture this morning, and came to pretty much the
> same conclusions. It'd surely be as much work as writing an OS
from
> scratch to iron out all the varieties in system architecture.
>
> So, off to get my PIC burner then and join the embedded systems
> club...
>
> Dave Kowalczyk
> Ames IA
>
> --- In CAD_CAM_EDM_DRO@y..., beer@s... wrote:
> {snip}
> >
> > Oh, do have fun with that x86 ASM code.
> >
> > And understand that what unless you have the Intel uP manual for
the
> > processor you're using AND you have the datasheets on the chipset
> for
> > the motherboard you're using AND you have BIOS code to understand
> how
> > those support chips are initialized, you have no idea how long
your
> > loops are going to take !
> >
> > For example, your
> >
> > JMP Shift
> >
> > instructions will take MORE CPU cycles on a 486 than a 386, more
> still
> > on a Pentium and most of all on a PII ( the first time ).
> >
> {snip}