Re: [CAD_CAM_EDM_DRO] Re: Re: Black box

> From: ballendo@...
> P.S. If you're planning to issue steps from a "timebase" of 8192hz, I
> think you're going to follow the same rocky path that EMC(steppers)
> followed. See Matt Shavers recent post(referring to this in earlier
> posts)
>
> If you're going to use one channel of the 8254, or the pentium Rdstc
> (undocumented, HaH!)instruction, you'll still be dealing with base 2
> type granularity problems, but that is what CNCpro and EMC are using
> (8254), so it DOES work.
>
> The rdstc (read time stamp counter) is a Pentium specific(uP
> internal) that increments at the clock frequency! Not all pentiums
> have it accessible, but it may be worth a look.

1. If you read a high speed counter (or sit in a timing loop), you've stopped
servicing the GUI.

2. If you use a periodic interrupt from the 8254 as your timebase, the
granularity problem limits you to a low step rate,

3. If you try to speed up the periodic interrupts to cure the granularity
problem, you become interrupt bound and you either lock up, or the GUI
becomes unacceptably sluggish.

4. If you try to implement a scheduler that, reprograms the 8254 for each
successive interrupt, the granularity problem is solved, but you'll discover
that since the 8254 is out on the ISA bus, each reprogramming cycle takes
10uS or more (sometimes a lot more if a DMA operation is going on over the
ISA bus), and then you run into problems with jitter in the step pulse
output.

5. One promising avenue that's not yet been fully investigated is:

http://vincent.oberle.com/apic_timer-index.html

I don't know how hard it would be to use this idea under Windows 9x, but it
might be worth looking at.

Matt