Re: [CAD_CAM_EDM_DRO] Re: Dedicated mb for PID

For what I am trying to accomplish, a quadrature decoder, two U/D counters,
an adder and a DAC could do everything. The comparator circuit in the G320
would work fine. Just take the 8 bit output of the adder, run it through a
software PID algorithm and update the DAC accordingly. Fifty lines of
qbasic (or whatever) would run the thing. Not esoteric but at least a
non-EE could make it work.

Seems like this could be done for about $10 per axis plus the cost of the
pcb card, which could be ISA or PCI.

I am digitally challanged so this is beyond my ability. That is why I
proposed using existing cards.

Doug

----- Original Message -----
From: vavaroutsos <pete@...>

> Jon, what FPGA did you have in mind? I haven't looked at all the
> latest and greates, but I don't know of any that have on board DACs
> or differential line receivers. Did you intednd to use an FPGA for
> bus interface, quadrature decoding, and general purpose I/O (gpio)
> with external DACs, opto isolators, and line receivers?
>
> I think this will cost more than $30. If enough people are interested
> in designing a low cost servo interface card like this, I'll
> volunteer for schematics and FPGA code. Now all we need is PCB
> layout/fab, parts, assembly, and software support in EMC.
>
> ~petev